| 摘要 |
An ESD protection circuit includes a resistive element (11), a capacitive element, a protective element (13), and a controller (14). The resistive element (11), the protective element (13), and the controller (14) are formed in an element formation layer (10). The capacitive element is constituted at least in part by interwire capacitance (100) formed in a plurality of wire layers (20). The capacitance formation region formed by the interwire capacitance (100) at least partially overlaps in plan view the element formation region in which the resistive element (11), the protective element (13), and the controller (14) are formed. |
