发明名称 aparelho de compressão de blocos de pixels em um sistema de processamento de imagem.
摘要 A memory efficient image processor receives DPCM prediction error values from decompressed MPEG coded digital video signals in the form of pixel blocks containing luminance and chrominance data in a 4:2:2 or 4:2:0 format and recompresses the pixel blocks to a predetermined resolution. Luminance and chrominance data are processed with different compression laws during recompression. Luminance data are recompressed to an average of six bits per pixel, and only a reference pixel and one other pixel are processed separately from all other luminance pixels in a block. Chrominance data are recompressed to an average of four bits per pixel. Each pixel block is stored with overhead information facilitating efficient and accurate reconstruction. Accurate pixel reconstruction is facilitated by processing a reference pixel accurately; scaling the pixel block; employing quantization tables which are symmetrical and fitted to the domain of the pixel block; biasing negative prediction error values to positive values; using short codewords in quantization tables at levels which are most likely to occur statistically; and processing each pixel with three, four or five bit quantization to ensure maximum resolution and an overall four-bit average for the pixel block.
申请公布号 BR9713711(B1) 申请公布日期 2011.06.28
申请号 BR19979713711 申请日期 1997.12.09
申请人 发明人 HAOPING YU;BARTH ALAN CANFIELD;BILLY WESLEY BEYERS;WAI-MAN LAM
分类号 H04N7/50;G06T9/00;H04N7/26;H04N7/34 主分类号 H04N7/50
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