发明名称 INFORMATION PROCESSOR, POWER CONSUMPTION REDUCTION METHOD, POWER CONSUMPTION REDUCTION PROGRAM, AND BACKPLANE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide an information processor, a power consumption reduction method, a power consumption reduction program, and a backplane capable of preventing excessive power consumption. <P>SOLUTION: In the information processor to which a plurality of nodes are connected through a backplane, each node is equipped with a plurality of crossbar chips, each incorporating a temperature sensor, a power source for supplying power to each crossbar chip, and a current sensor for measuring a current value on the output side of the power source, and the backplane is equipped with a plurality of crossbar chips, each incorporating a temperature sensor, a power source for supplying power to each crossbar chip, a current sensor for measuring a current value on the output side of the power source, and a control means for monitoring the current sensor and the temperature sensor in the plurality of nodes and in the backplane itself. When the current value and the temperature are lower than a threshold value, the route is changed to the one in which the crossbar chip concerned is not used. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011108074(A) 申请公布日期 2011.06.02
申请号 JP20090263679 申请日期 2009.11.19
申请人 NEC CORP 发明人 MIZUKO YOICHI
分类号 G06F1/32;G06F1/00 主分类号 G06F1/32
代理机构 代理人
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