发明名称 |
METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor package that has high connection reliability between a semiconductor chip and a wiring structure and can reduce void formation. <P>SOLUTION: The method of manufacturing the semiconductor package includes: a first step of forming an insulating layer which is made of a photosensitive material and is in a half-cured state on a support; a second step of forming an opening for exposing the support in the insulating layer by a photolithography method; a third step of arranging the semiconductor chip on the insulating layer so that an electrode of the semiconductor chip is positioned at the opening, and curing the insulating layer; a fourth step of forming a sealing resin for sealing the semiconductor chip on a surface of the insulating layer on the side of the semiconductor chip; a fifth step of removing the support; and a sixth step of providing a wiring layer electrically connecting with the electrode exposed in the opening on a surface of the insulating layer on the opposite side from the semiconductor chip to form the wiring structure including the insulating layer and wiring layer. <P>COPYRIGHT: (C)2011,JPO&INPIT |
申请公布号 |
JP2011100793(A) |
申请公布日期 |
2011.05.19 |
申请号 |
JP20090253434 |
申请日期 |
2009.11.04 |
申请人 |
SHINKO ELECTRIC IND CO LTD |
发明人 |
OI ATSUSHI;HIZUME TORU;KATAGIRI FUMIMASA;TATEIWA AKIHIKO |
分类号 |
H01L23/12 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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