发明名称 METHOD AND SYSTEM FOR DETERMINING LOT START PRIORITY OF SEMICONDUCTOR FABRICATION
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a method for analytically determining load rates of devices, an arrival order of lots to each device, delay of each lot from scheduled start date and time, and respective orders of express lots and usual lots when determining start priority. <P>SOLUTION: In this method for determining lot start priority of semiconductor fabrication, the start priority of a plurality of lots is determined by executing: a lot progress calculation step 101 of calculating a delay time from the difference between scheduled completion date and time and actual date and time for each process of the lot; a device information acquisition step 102 of acquiring the number of operating devices for each type and each process of the devices; a restoration load/device load calculation step 103 of calculating a start priority determination index of a first lot from the delay time, the number of operating devices and a process processing standard time; and a start priority determination step 104 of determining start priority from the start priority determination index of the first lot. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011100833(A) 申请公布日期 2011.05.19
申请号 JP20090254111 申请日期 2009.11.05
申请人 RENESAS ELECTRONICS CORP 发明人 KAMODA KOUJI;NISHIHARA NOBUAKI;IMAZAWA KEI;FUJIWARA SHOICHIRO
分类号 H01L21/02;G05B19/418 主分类号 H01L21/02
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