| 摘要 |
Provided is a bus arbitration circuit including: a fixed priority determination circuit that grants a bus use right to an access request from a higher priority bus master among access requests from a plurality of bus masters; and a determination adjustment circuit that determines whether or not to assert the access request from the plurality of bus masters to the fixed priority determination circuit. The determination adjustment circuit masks an access request from a bus master which is granted the bus use right, for a given period of time, when the access request from the bus master which is granted the bus use right and an access request from a bus master which is not granted the bus use right compete with each other.
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