| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a linear sampling switch which shows a stronger linear response. Ž<P>SOLUTION: A sampling circuit is composed of a p-type channel and n-type channel field effect transistors (FET). The source node of the p-type channel FET (42) is jointed to the drain node of the n-type channel FET (40), and the drain node of the p-type channel FET (42) is jointed to the source node of the n-type channel FET (40). A sampling clock is jointed to a gate node of each FET. A first side of a linear sampling circuit is connected to an analogue or RF signal source, and the opposite side of the linear sampling circuit is connected to a holding capacitor (44). The n-type channel FET has an n-type channel width. The p-type channel FET has a p-type channel width. The p-type channel width is larger than the n-type channel width so as to increase the linearity of ON-resistance of the switch as a result. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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