发明名称 MEMORY DEVICE AND MEMORY CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To provide a memory device reducing power consumption, and a memory control method. SOLUTION: The memory device using a bitline division system includes a block having a plurality of memory cell arrays connected to divided bitlines, a first decoder for generating a block selection signal to select at least one block based on an input address signal, a read/write part disposed for each block to read or write a memory cell array belonging to an own block, and a signal generation part for setting, if the own block is selected based on the block selection signal, the read/write part belonging to the block in an operation state, and setting, if the own block is not selected based on the block selection signal, the read/write part belonging to the block in a nonoperation state. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009230787(A) 申请公布日期 2009.10.08
申请号 JP20080073267 申请日期 2008.03.21
申请人 FUJITSU LTD 发明人 RIN YASUHIDE;ISANE KENJI;MURATA SEIJI
分类号 G11C11/41 主分类号 G11C11/41
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