发明名称 Data packet buffering system with automatic threshold optimization
摘要 Data packet buffering system comprising a data buffer for buffering data packets, a first counter (24) preloaded with the data packet size (32) and decremented at each read clock signal of a number of logical units corresponding to the width of the output bus (18), a second counter (28) preloaded with the data packet size and decremented at each write clock signal of a number of logical units corresponding to the width of the input bus (14), the decrementation of the second counter being started at the same time as the decrementation of the first counter by a start counter signal (38), and a threshold unit (52) for determining the minimum threshold from the contents of the second counter when the first counter has reached zero and providing the minimum threshold to a buffer management logic unit a buffer management logic unit (22) providing write grant signals when data may be read from the data buffer and sent to an output device.
申请公布号 US7546400(B2) 申请公布日期 2009.06.09
申请号 US20050906345 申请日期 2005.02.15
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 SUZZONI JEAN-PIERRE;GORZEGNO FABRICE;GUENOUN LIONEL;ROMAN DENIS
分类号 G06F3/00;G06F5/00;G06F5/06;G06F13/00;G06F13/14;G11C8/00;H04L12/26;H04L12/28;H04L12/56 主分类号 G06F3/00
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