| 摘要 |
To provide a memory controller capable of flexibly dealing with the change in the form of use or operation state of a system, a memory controller (1100) includes bus interfaces (1200, 1210, 1220), a memory controller core unit (1300), and a memory interface (1400). The memory controller core unit (1300) has a command controller (1320). The bus interface units (1200, 1210, 1220) and command controller (1320) exchange commands via a bus (1310).
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