| 摘要 |
A test pattern of semiconductor device and method for forming the same is provided to monitor a problem generated at interface between a polysilicon layer and metal film of a metal gate by calculating and the resistance of a cell analyzing it. In a test pattern of the semiconductor device, a semiconductor substrate includes an element isolation film(102) defining the active area(100). An ion implantation layer within the active area surface of the both sides adjacent to the element isolation film(108). A plurality of gates is composed of a polysilicon film(106,110) and metal film(112). A metal contact connects junction area connecting ion implanting layer and both gates on the isolation film on the gate.
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