METHODS AND CIRCUITS FOR GENERATING CONTROL SIGNAL OF SEMICONDUCTOR MEMORY DEVICE

摘要

A method and a circuit for generating a control signal of a semiconductor memory device are provided to maintain constant timing of a column selection signal and a sense amplifier control signal and a data transfer control signal. A column selection signal(CSL) is enabled after first delay time from the time when a column selection master signal is enabled. A read pulse signal(FRP) is enabled after second delay time from the time when the column selection signal is enabled. A sense amplifier control signal(PIOSE) and a data transfer control signal(PWRD) are enabled after third delay time from the time when the column selection master signal is enabled, and then the sense amplifier control signal and the data transfer control signal are disabled by the enable of the read pulse signal. The first delay time, the second delay time and the third delay time are determined by delay time of delay elements on the path where the signals are transferred.