发明名称 |
Methods of forming different gate structures in NMOS and PMOS regions and gate structures so formed |
摘要 |
A method of forming transistor gate structures in an integrated circuit device can include forming a high-k gate insulating layer on a substrate including a first region to include PMOS transistors and a second region to include NMOS transistors. A polysilicon gate layer can be formed on the high-k gate insulating layer in the first and second regions. A metal silicide gate layer can be formed directly on the high-k gate insulating layer in the first region and avoiding forming the metal-silicide in the second region. Related gate structures are also disclosed.
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申请公布号 |
US7399670(B2) |
申请公布日期 |
2008.07.15 |
申请号 |
US20050183651 |
申请日期 |
2005.07.18 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD |
发明人 |
JEON TAEK-SOO;SHIN YU-GYUN;KANG SANG-BOM;PARK HONG-BAE;CHO HAG-JU;LEE HYE-LAN;JIN BEOM-JUN;PARK SEONG-GEON |
分类号 |
H01L21/8238;H01L21/3205;H01L21/4763;H01L21/8234 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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