摘要 |
An adaptive equalizer including n filters in parallel with one another to output signals generated from filtered input data; n error generation units, in parallel with one another, to respectively generate errors with respect to the signals output from the n filters; n filter coefficient update units, in parallel with one another, to respectively update filter coefficients of the n filters using the errors output from the n error generation units and the data input to the n filters; and a clock divider to divide a clock signal by n and to provide the n-divided clock signals having different phases to the n filters, the n error generation units, and the n filter coefficient update units, wherein n is a natural number equal to or greater than 2.
|