发明名称 Systematic yield in semiconductor manufacture
摘要 Three-dimensional structures are provided which improve manufacturing yield for certain structures in semiconductor devices. The three-dimensional structures take into account the interaction between an upper layer and a lower layer where the lower layer has a tendency to form a non-planar surface due to its design. Accordingly, design changes are performed to make structures more likely to function, either by forming a more planar surface on the lower layer or by compensating in the upper layer for the lack of planarity. The changes to improve manufacturing yield are made at the design stage rather than at the fabrication stage.
申请公布号 US7337415(B2) 申请公布日期 2008.02.26
申请号 US20040711978 申请日期 2004.10.18
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BERGERON PAUL H.;HIBBELER JASON D.;TELLEZ GUSTAVO E.
分类号 G06F17/50 主分类号 G06F17/50
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