| 摘要 |
PROBLEM TO BE SOLVED: To provide a FIFO memory improved in data transmission efficiency. SOLUTION: The memory comprises a dual port RAM (110) as storing means having a first access port to be operated in synchronization with a first clock signal and a second access port to be operated in synchronization with a second clock signal, a write pointer producing circuit (120) as write pointer producing means for producing a write pointer based on a write signal to be inputted to the first access port, a read pointer producing circuit (150) as read pointer producing means for producing a read pointer based on a read signal to be inputted to the second access port, and a full/empty determining circuit (140) as determining means for determining a storage area of the storing means to be full when difference between the write pointer and the read pointer becomes not larger than a predetermined margin. COPYRIGHT: (C)2008,JPO&INPIT
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