发明名称 Noise-resistive, burst-mode receiving apparatus and a method for recovering a clock signal and data therefrom
摘要 A noise-resistive, burst-mode receiving apparatus including a voltage control signal generator for multiplying a frequency of a system clock signal and generating a voltage control signal having a level that corresponds to the multiplied frequency; a reset signal generator for delaying an irregular input signal in the unit of a packet, in response to the voltage control signal, performing an exclusive OR operation on the delayed and input signals, and outputting the result as a reset signal; a clock signal generator for generating a signal having a level that is changed at the middle point of each bit included in the packet as a recovered clock signal in response to the reset signal and the voltage control signal and outputting the recovered clock signal; and an output buffer for buffering the input signal and outputting the buffered signal as recovered data in response to the recovered clock signal.
申请公布号 US7177381(B2) 申请公布日期 2007.02.13
申请号 US20020179400 申请日期 2002.06.26
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM YU-KUN;LEE SEUNG-WOO;CHOI WOO-YOUNG;KIM NAM-GUK;RYU HYUN-SURK
分类号 H03D3/24;H03K19/20;H03L7/06;H03L7/08;H04L7/033;H04L27/22 主分类号 H03D3/24
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