发明名称
摘要 <p>&lt;P&gt;PROBLEM TO BE SOLVED: To easily specify a factor and a location of fault when the fault occurs by realizing a bit error test in Ethernet (R). Ž&lt;P&gt;SOLUTION: One device prepares patten data for an error test and error test identification information showing that a packet is for an error test, generates a packet for an error test having the pattern data for an error test and the error test identification information and transmits the packet for an error test to other devices. The other devices do not apply FCS check processing to a packet having the error test identification information. Then, the other devices receive the packet for an error test and can perform a bit error test by collating prestored pattern data with the pattern data of the received packet. Ž&lt;P&gt;COPYRIGHT: (C)2004,JPO Ž</p>
申请公布号 JP3827632(B2) 申请公布日期 2006.09.27
申请号 JP20020338629 申请日期 2002.11.21
申请人 发明人
分类号 H04L1/00;H04L12/28;H04L12/70 主分类号 H04L1/00
代理机构 代理人
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