发明名称 Twin insulator charge storage device operation and its fabrication method
摘要 The invention proposes am improved twin MONOS memory device and its fabrication. The ONO layer is self-aligned to the control gate horizontally. The vertical insulator between the control gate and the word gate does not include a nitride layer. This prevents the problem of electron trapping. The device can be fabricated to pull the electrons out through either the top or the bottom oxide layer of the ONO insulator. The device also incorporates a raised memory bit diffusion between the control gates to reduce bit resistance. The twin MONOS memory array can be embedded into a standard CMOS circuit by the process of the present invention.
申请公布号 US2006187709(A1) 申请公布日期 2006.08.24
申请号 US20060409376 申请日期 2006.04.21
申请人 发明人 OGURA SEIKI;SATOH KIMIHIRO;SAITO TOMOYA
分类号 G11C16/04 主分类号 G11C16/04
代理机构 代理人
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