| 发明名称 |
SEMICONDUCTOR PACKAGE AND ITS MANUFACTURING METHOD |
| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor package structure and its manufacturing method wherein a problem due to implantation of an underfill material in a conventional manufacturing method is solved. <P>SOLUTION: The semiconductor package 200 includes a substrate 206 and a semiconductor element 204 provided on the substrate by flip-chip bonding. It includes a formation and connection structure 212 of a hardened adhesive extending along the periphery of a bottom surface of the semiconductor element and provided between the semiconductor element and the substrate. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
| 申请公布号 |
JP2006186116(A) |
申请公布日期 |
2006.07.13 |
| 申请号 |
JP20040378445 |
申请日期 |
2004.12.28 |
| 申请人 |
ADVANCED SEMICONDUCTOR ENGINEERING INC |
发明人 |
WENG GWO-LIANG;LU YUNG-LI;CHU CHI-CHIH;LEE SHIH-CHANG |
| 分类号 |
H01L21/60;H01L21/56 |
主分类号 |
H01L21/60 |
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