摘要 |
Present invention suggests a method to extract accurate value and time domain of the current in the VLSI circuit, which is almost impossible by the conventional methods. Conventional approaches take the current of a cell as a constant average value extracted by power consumption, which makes designers underestimate peak current and IR-drop of a system. There is no current model considering the cell (or gate) delay and node slew rate even though they are significant factors for the cell current behavior. To re-construct the current waveform efficiently, we divide the cell current into the intrinsic and the output load current. The intrinsic current can be computed with energy value from the power library when the cell becomes active. The load current is computed based on the slew rate, effective start and end time points of the current wave. Instead of using the conventional current information, present invention reconstructs the current information of the design. Due to the accurate current analysis, it has outstanding accuracy to analyze the whole chip precisely in IR drop analysis and peak power analysis.
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