发明名称 MRAM architecture
摘要 An MRAM architecture is provided that reduces the number of isolation transistors. The MRAM architecture includes magnetoresistive memory cells that are electrically coupled to form a ganged memory cell. The magnetoresistive memory cells of the ganged memory cell are formed with Magnetic Tunnel Junctions (MTJs) and formed without isolation devices, such as isolation transistors, and a programming line and a bit line are adjacent to each of the magnetoresistive memory cells. Preferably, the magnetoresistive memory cells of the ganged memory cell only include MTJs, and a programming line and a bit line are adjacent to each of the magnetoresistive memory cells.
申请公布号 US6888743(B2) 申请公布日期 2005.05.03
申请号 US20020331058 申请日期 2002.12.27
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 DURLAM MARK A.;ANDRE THOMAS W.;BUTCHER BRIAN R.;DEHERRERA MARK F.;ENGEL BRADLEY N.;GARNI BRADLEY J.;GRYNKEWICH GREGORY W.;NAHAS JOSEPH J.;RIZZO NICHOLAS D.;TEHRANI SAIED;TRACY CLARANCE J.
分类号 G11C11/15;(IPC1-7):G11C11/02 主分类号 G11C11/15
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