发明名称 CLOCK SIGNAL CORRECTION CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To enhance the accuracy of a clock signal by appropriately correcting varied clock signal even if a change in operating environments such as temperature varies the phase of the clock signal outputted from an oscillator. <P>SOLUTION: This clock signal correction circuit corrects a clock signal outputted from the SAW oscillator 2. A standard radio wave is received, a carrier wave signal synchronized with the carrier wave of the received radio wave is generated by a standard radio wave reception part 4, and the phase of the clock signal is corrected by a phase control part 6 so that the generated carrier wave signal is phase-locked with the clock signal. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005106683(A) 申请公布日期 2005.04.21
申请号 JP20030341615 申请日期 2003.09.30
申请人 SEIKO EPSON CORP 发明人 KARAKI ISUKE
分类号 G04R20/00;G04G3/00;G04R20/10;G04R40/02 主分类号 G04R20/00
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