发明名称 METHOD FOR GENERATING PARALLEL PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a hardware description means suited to the development of a parallel processing system provided with a plurality of elements to be independently operated in parallel. SOLUTION: A definition file (DIDL) 1 which has a plurality of parallel descriptions respectively regulating a plurality of parallel processing elements to be synchronously and independently performed, and takes it that the latency of respective input data included in each parallel description provided with a plurality of input data is the same after inputting these data to the system, is provided. A compiler 2 provided with a function 35 for reading in the DIDL 1, a function 36 for generating circuit constitution by referring to a hardware library 3 and a function 37 for controlling the latency of the input data can output hardware constitution information defined by the DIDL 1. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005018626(A) 申请公布日期 2005.01.20
申请号 JP20030185481 申请日期 2003.06.27
申请人 IP FLEX KK 发明人 SHIMURA MASARU
分类号 G06F17/50;G06F11/25;G06F15/16;G06F15/80;(IPC1-7):G06F17/50 主分类号 G06F17/50
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