发明名称 |
INFORMATION PROCESSOR, MEMORY, INFORMATION PROCESSING METHOD AND PROGRAM |
摘要 |
PROBLEM TO BE SOLVED: To provide an information processor by which the number of signal input/output terminals of a memory control section is reduced, and the transfer of data retained in a cache memory to a memory section is efficiently achieved. SOLUTION: The memory control section is connected to the memory section by using a bus sharing the transfer of an address, data, and a controlling signal. The memory control section outputs a first command including the first given position of the memory section to the memory section and outputs a second command including a second given position after a given time elapses. COPYRIGHT: (C)2005,JPO&NCIPI
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申请公布号 |
JP2004310547(A) |
申请公布日期 |
2004.11.04 |
申请号 |
JP20030104546 |
申请日期 |
2003.04.08 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
OZAKA MASATAKA |
分类号 |
G06F12/02;G06F12/00;G06F12/08;G06F13/16;(IPC1-7):G06F12/02 |
主分类号 |
G06F12/02 |
代理机构 |
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代理人 |
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地址 |
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