发明名称 PROCESS FOR FABRICATING CAPACITOR, MEMORY, AND ELECTRONIC APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide a capacitor in which lattice mismatch is suppressed between an electrode and a ferroelectric layer. SOLUTION: The process for fabricating a capacitor 200 having a lower electrode 210 and a ferroelectric layer 230 comprises a metal layer forming step for forming the lower electrode 210, a step for forming a buffer layer 220 having a lattice constant between those of the lower electrode 210 and the ferroelectric layer 230 and exhibiting ferroelectric characteristics on the lower electrode 210, and a step for forming the ferroelectric layer 230 on the buffer layer 220. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004296919(A) 申请公布日期 2004.10.21
申请号 JP20030089112 申请日期 2003.03.27
申请人 SEIKO EPSON CORP 发明人 KARASAWA JUNICHI;OHASHI KOJI;HAMADA YASUAKI;KIJIMA TAKESHI;NATORI EIJI
分类号 H01L21/316;H01L21/8246;H01L27/105;(IPC1-7):H01L27/105 主分类号 H01L21/316
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