发明名称 Read-only memory with reduced loading value
摘要 By adding multiple rows of auxiliary switches and then multiple current paths a read only memory circuit can be formed to reduce loading values when reading a specific memory cell. Therefore, the current can be increased, and the error probability of the sense amplifier can be reduced when reading a specific memory cell.
申请公布号 US6791860(B2) 申请公布日期 2004.09.14
申请号 US20030436389 申请日期 2003.05.12
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 CHEN SHI-XIAN
分类号 G11C17/12;(IPC1-7):G11C17/00 主分类号 G11C17/12
代理机构 代理人
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