发明名称 Small dimension logic integrated circuit construction having first/second capacitor series connected first/second node and control wire common point connected between capacitors.
摘要 The integrated circuit has a first (C1) and second (C2) capacitor connected in series between a first and second node. A control wire (450) is connected to the common point between the two capacitors.
申请公布号 FR2833783(A1) 申请公布日期 2003.06.20
申请号 FR20010016072 申请日期 2001.12.13
申请人 STMICROELECTRONICS SA 发明人 SCHOELLKOPF JEAN PIERRE;JACQUET FRANCOIS;ROCHE PHILIPPE
分类号 G11C11/412;H01L27/11;H03K3/037 主分类号 G11C11/412
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