发明名称 Method for verifying and improving run-time of a memory test
摘要 A method of generating and verifying a memory test is disclosed. A simulator is used to verify that the sequence of time-ordered commands complies with a set of operating constraints for the memory. A packer may thereafter be used to optimize run time of the verified test.
申请公布号 US6574759(B1) 申请公布日期 2003.06.03
申请号 US20000484431 申请日期 2000.01.18
申请人 RAMBUS INC. 发明人 WOO STEVEN CAMERON;PRIVITERA JOHN PHILIP;HOROWITZ MARK ALAN
分类号 G11C29/54;(IPC1-7):G11C29/00 主分类号 G11C29/54
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