发明名称 Wafer map display apparatus and method for semiconductor test system
摘要 A wafer map display apparatus and method for displaying an entire image of a semiconductor wafer and IC chips therein with an optimal display size within a specified window size. The wafer map display apparatus acquires window size information for displaying a wafer map of a semiconductor wafer under test in a specified window, and calculates a chip display size every time when test results and XY address data of an IC chip that has been tested is received with use of all of XY address data of IC chips that have been tested, and renews the wafer map display based on the newest chip display size, thereby displaying all of the IC chips that have been tested and an overall semiconductor wafer under test with an optimum size within the specified window.
申请公布号 US6552527(B1) 申请公布日期 2003.04.22
申请号 US20000711704 申请日期 2000.11.13
申请人 ADVANTEST CORP. 发明人 NANBU MITSUE
分类号 G06F3/048;G01R31/28;H01L21/66;H01L23/544;(IPC1-7):G01R15/08 主分类号 G06F3/048
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