Semiconductor random-access memory device e.g. for notebook computer, has memory cell arrays capable of performing random access function

摘要

#CMT# #/CMT# A non-volatile memory device has a main-memory cell array, and a sub-memory cell array, the latter consisting of a number of NAND-cell rows each consisting of a number of memory cell transistors where the number of memory cell transistors in the cell rows is less than the number of memory cell transistors in the NAND-rows of the main memory cell array. During programming and erasure, the sub-memory cell array is operatively joined to the main bit lines of the main-memory cell array, and has separate read-path independent of the that of the main-memory cell array. #CMT# : #/CMT# Independent claims are given for the following. (1) Memory cell array structure; (2) Electrically programmable non-volatile semiconductor memory device; (3) Method for accessing memory cell array; (4) NAND-flash memory device. #CMT#USE : #/CMT# Non-volatile semiconductor memory device e.g. for notebook computer. #CMT#ADVANTAGE : #/CMT# Higher speed of data reading than with high speed random access or access to a small amount of data. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# A block-diagram of a memory cell array of a semiconductor memory device is given.(Contains non-English text). 10 : Virtual power control device 30 : Read amplifier 50 : Sub-array column selector 90 : Page buffer 100 : Main memory cell array 200 : Sub-memory cell array.