发明名称 MEMORY CONTROL DEVICE AND METHOD
摘要 PROBLEM TO BE SOLVED: To improve the accessing efficiency in switching a bank by moving the access to another bank in a clock cycle where the data is not exchanged in a bank, in a memory control device and a memory control method for controlling SDRAM composed of plural banks. SOLUTION: An inputted request is divided into requests for each of the banks by a request distributing circuit 11, and a command for each bank is generated by command generating circuits 12A, 12B for each bank. During a period when the data is not exchanged in the present bank, a precharge command of the present bank is procrastinated, and the access command of another bank takes priority. Therefore a weight in exchanging the bank is not generated, and the access can be efficiently executed.
申请公布号 JP2002288037(A) 申请公布日期 2002.10.04
申请号 JP20010089303 申请日期 2001.03.27
申请人 SONY CORP 发明人 YAMANAKA KATSUHIKO
分类号 G11C11/407;G06F12/00;G06F12/06;G11C11/401;G11C11/409;(IPC1-7):G06F12/06 主分类号 G11C11/407
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