发明名称 MULTIPLICATION CIRCUIT USING A MULTIPLIER AND A CARRY PROPAGATING ADDER
摘要 <p>A multiplication circuit used for a high speed multiplier in a computer system is basically constituted by a multiplier and a carry propagating adder, the multiplier obtains a sum and carry per each bit by using carry save adder trees having a plurality of carry save adders, and generates a carry generation function and a carry propagation function based on the sum and carry by using a generation/propagation unit. The carry propgating adder obtains a final product based on the carry generation function and carry propagation function, and the carry generation function and carry propagation function generated by the generation/propagation unit are fed back to a final stage of the carry save adder.</p>
申请公布号 CA1232072(A) 申请公布日期 1988.01.26
申请号 CA19840469911 申请日期 1984.12.12
申请人 FUJITSU LIMITED 发明人
分类号 G06F7/52;G06F11/00;G06F11/16 主分类号 G06F7/52
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