摘要 |
A test structure and a method for detecting early failures in a large ensemble of semiconductor elements, particularly applicable to on-chip interconnects, is provided. A novel approach to gain information about the statistical behavior of several thousand interconnects and to investigate possible deviations from perfect lognormal statistics is presented. A test structure having a Wheatstone Bridge arrangement and arrays of several hundred interconnects may be used to prove that failure data does not deviate from lognormal behavior down to a cumulative failure rate of approximately one out of 20,000. Typical test structure sizes may, therefore, be extended far beyond standard test procedures to gain information about the statistical behavior of failure mechanisms and to verify the validity of the assumption that failure mechanisms follow lognormal statistical behavior.
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