SECURE PROGRAMMABLE LOGIC DEVICE

摘要

A programmable logic chip (21) and configuration memory chip (23) are mounte d within a multi-chip module (25) to form a single package. The configuration memory has a security bit (24) which in a first state allows programming a read-back of configuration data in the memory chip via external pins (29) of the package, and in a second state allows only erase command to be communicated to the memory chip via the external pins. The internal data transfer connection (27) between the memory chip and programmable logic chip is enabled when the security bit is in the second state and the memory chip is in a read-back mode, allowing configuration data to be loaded into the logic chip upon power up.