发明名称 |
Tri-layer resist method for dual damascene process |
摘要 |
Under the first embodiment of the invention, a three layer composite layer of insulation is deposited. The trench is etched into this composite layer of insulation followed by a hard bake. The via etch is performed, completing the formation of the dual damascene profile. The created dual damascene profile is transferred into the underlying substrate; the layer of photoresist is removed. Under the second embodiment of the invention, a two layer composite layer of insulation is deposited over a semiconductor surface. The trench is etched into this composite layer of insulation. A layer of positive photoresist is deposited over the second layer of cross-linked negative resist and masked for the via etch. The via etch is performed, the created dual damascene profile is transferred into the underlying substrate. The removal of the layers of patterned photoresist completes the formation of the dual damascene structure.
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申请公布号 |
US6242344(B1) |
申请公布日期 |
2001.06.05 |
申请号 |
US20000498986 |
申请日期 |
2000.02.07 |
申请人 |
INSTITUTE OF MICROELECTRONICS |
发明人 |
KOH LEONG TEE;SAJAN MAROKKEY RAPHAEL;CHENG TSUN-LUNG ALEX;XIE JOSEPH ZHIFENG |
分类号 |
H01L21/027;H01L21/311;H01L21/768;(IPC1-7):H01L21/476 |
主分类号 |
H01L21/027 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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