发明名称 SAMPLE-AND-HOLD CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a sample-and-hold circuit which can be operated in a wide band, while reducing the influence of clock-feed-through. SOLUTION: In a sample-and-hold circuit, having a sample switch sampling analog input voltage and a hold-capacitor holding analog input voltage sampled by the sample switch and outputting it as analog output voltage, analog output voltage is compared with reference voltage, when the analog output voltage is lower than the reference voltage, the circuit helps to charge the hold- capacitor, and when the analog output voltage is higher than the reference voltage, the circuit helps to discharge the hold-capacitor.
申请公布号 JP2001143492(A) 申请公布日期 2001.05.25
申请号 JP19990319638 申请日期 1999.11.10
申请人 KAWASAKI STEEL CORP 发明人 TAKADA MASATOSHI
分类号 G11C27/02;(IPC1-7):G11C27/02 主分类号 G11C27/02
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