CMOS logic gate having buried channel NMOS transistor for semiconductor devices and fabrication method of the same

摘要

A CMOS logic gate for a semiconductor apparatus having a buried channel NMOS transistor and a fabrication method of the same are disclosed. The CMOS logic gate according to the present invention includes a pull up unit gate-connected by an input voltage and pulling up an output voltage, a buried channel NMOS transistor connected with the pull up unit and gate-connected by a power voltage, and a surface channel NMOS transistor connected with the buried channel NMOS transistor and gate-connected by the input voltage for pulling down the output voltage for thereby enhancing a reliability of the CMOS logic gate.