| 摘要 |
The invention is an integrated circuit data storage array with storage cells disposed in an array of rows and columns with each cell having a number of subcells. The physical location of the subcells substantially reduces the space taken by horizontal data line used for accessing columns. This is accomplished by locating subcells of the same row number, the same bit number, and different column number adjacent to each other in the horizontal direction. As a result, a horizontal data line only extends between adjacent subcells and significantly reduces the wasted layout of multibit horizontal data lines.
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