Programmable digitizer with adjustable sampling rate and triggering modes

摘要

A digitizer can be programmed to digitize an ANALOG signal with a complex frequency pattern determined in response to set of trigger signals. The digitizer includes an addressable packet memory storing a set of data packets and produces one of its stored data packets as output when addressed. The output data packet includes both PERIOD and MODE data fields. The digitizer also incudes an analog-to-digital converter for digitizing the ANALOG signal at the frequency controlled by the PERIOD data output of the packet memory. The MODE data output of the packet memory tells a trigger logic circuit how to choose a next packet memory address and selects one of the trigger signals to tell the trigger logic circuit when to change the packet memory address so as to alter the digitizing frequency.