| 摘要 |
<p>The present invention pertains to the field of pulse technology and relates to a level-controlled D-trigger which can be used in memory elements or in controlled generators. This trigger can be realised using the complementary-MIS techniques with only six pairs of MIS transistors (1 - 12). The state fixation is achieved directly by using a logic signal which is formed at one of two clocked outputs (14, 16) by the action of clock (19, 20) pulses.</p> |
