发明名称 REDUNDANT SYSTEM
摘要 PROBLEM TO BE SOLVED: To facilitate the test of a final output circuit and to make it possible to find a failure in its early stages by providing an output interface circuit for modules with a register for outputting written data from all modules and a register for outputting data only from its corresponding module and neglecting other modules. SOLUTION: Redundant modules 11 to 1n are respectively provided with output interfaces 21 to 2n and generate respective outputs 31 to 3n. The outputs 31 to 3n are inputted to the final output circuit 4. When any one of the modules 11 to 1n can not generate a normal output due to a fault, the circuit 4 can select a normal output and continue normal operation. Different outputs 31 to 3n can be obtained in every module while allowing the modules 11 to 1n to synchronously execute the same instruction and a test pattern for operation check can be given to the final output circuit 4.
申请公布号 JPH10133900(A) 申请公布日期 1998.05.22
申请号 JP19960286390 申请日期 1996.10.29
申请人 HITACHI LTD 发明人 KANEKAWA NOBUYASU;YAMAGUCHI SHINICHIRO;MIYAZAKI NAOTO;KASUYA NAOHIRO
分类号 G06F11/16;G06F11/18;G06F11/22 主分类号 G06F11/16
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