发明名称 MANUFACTURE OF BONDED DIELECTRIC ISOLATION SUBSTRATE
摘要 <p>PROBLEM TO BE SOLVED: To manufacture a bonded dielectric isolation substrate, without uselessly consuming element-forming regions and make uniform the Si island depth distribution between wafers and in a wafer plane. SOLUTION: The surface of an Si wafer A for an active layer is etched through a mask 21 to form flat-bottom recesses 24 for forming scribe lines and V-grooves 25 for forming dielectric isolation grooves. An insulation film 26 and polysilicon layer 27 are formed and planarized. A wafer B for a support substrate is laminated and heat treated to form a bonded substrate C. An Si substrate 101 at the active layer is ground and polished. The flat bottoms of the recesses 24 serve for polishing stoppers. The area of the recesses 24 is set to 0.2-40% of the Si substrate entire surface. If less than 0.2%, they do not function as a polishing stopper and if exceeding 40%, the chip area is too small, resulting in reduction of the manufacturing efficiency.</p>
申请公布号 JPH1022378(A) 申请公布日期 1998.01.23
申请号 JP19960195316 申请日期 1996.07.05
申请人 MITSUBISHI MATERIALS SHILICON CORP;MITSUBISHI MATERIALS CORP 发明人 OI HIROYUKI
分类号 H01L21/762;H01L21/02;H01L21/301;H01L21/76;H01L27/12;(IPC1-7):H01L21/762 主分类号 H01L21/762
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