| 摘要 |
<p>An apparatus for and method of implementing a novel buffer based full duplex communication system is particularly useful in native signal processing systems with heavy contention for processor resources, such as in systems running multi-tasking operating systems, is disclosed. The major components of the communication system (30) of the present invention includes a receiver (34), transmitter (32), echo cancelor (36), CODEC (62) and telephone hybrid (42), and operate on a buffer of input samples consisting of a set of input bits to generate a buffer of output samples consisting of set of outputs bits. The invention utilizes a novel buffer switching mechanism to optimize the trade-off between processing response time, on one hand, and robustness to interrupt latency and processor implementation on the other hand, without a loss of signal coherency. By increasing the buffer size, the probability of a buffer underrun/overrun error occurring is reduced. Small buffers, however, provide the communication system with short and accurate response time.</p> |
