发明名称 |
System and method for minimizing simultaneous switching during scan-based testing |
摘要 |
A system and method for reducing simultaneous switching during scan-based testing of a system logic design. System logic is divided into clusters of system logic, and one or more scan chains are associated with each logic cluster. Each of the logic clusters are concurrently scan tested, yet circuitry in the scan chains associated with a cluster are triggered at different times than the circuitry in the scan chains of other clusters. Offset scan control signals provide the triggering for the scan chains of different clusters. Release and capture functions are also controlled to reduce simultaneous release and capture switching in different clusters. |
申请公布号 |
US5663966(A) |
申请公布日期 |
1997.09.02 |
申请号 |
US19960686105 |
申请日期 |
1996.07.24 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DAY, LELAND LESLIE;DOUSKEY, STEVEN MICHAEL;GANFIELD, PAUL ALLEN |
分类号 |
G01R31/3185;(IPC1-7):H04B17/00 |
主分类号 |
G01R31/3185 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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