发明名称 ATM CONTROLLER AND ATM COMMUNICATION CONTROLLER
摘要 <p>PROBLEM TO BE SOLVED: To obtain an ATM controller in which load on software processing is relieved by connecting the ATM controller to an external buffer memory to process an ATM layer and an AAL layer of an ATM protocol between a transmission line and a terminal equipment. SOLUTION: The ATM controller 8 is made up of an interface circuit 90 to interface with a system bus 6 of a terminal equipment 1, a transmission reception control section 70 and an MPU 100 or the like to generate and analyze cells. The MPU 100 in an ATM communication controller 2 processes only processing contents with high requirements with respect to revision of the processing content such as management cell generating analysis processing and interface processing with the terminal equipment 1 generated in the unit of packets. The processing content with priority on high speed performance such as CRC calculation and cell disassembling/assembling processing is processed by a wired logic. The processing load of the MPU 100 is relieved through the share of the processing contents.</p>
申请公布号 JPH09205439(A) 申请公布日期 1997.08.05
申请号 JP19960012054 申请日期 1996.01.26
申请人 HITACHI LTD;HITACHI MICROCOMPUT SYST LTD 发明人 YOKOYAMA TATSUYA;MIZUTANI MIKA;TAKADA OSAMU;HATA EIZO;WATANABE YOSHIKI
分类号 G06F13/00;H04L12/28;H04Q3/00;(IPC1-7):H04L12/28 主分类号 G06F13/00
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