发明名称 Drive circuit for flash memory with improved erasability
摘要 The present invention relates to improvements in erasing a flash memory. An object of the present invention is to shorten the erasing time. During pre-erase writing, at least either word lines or bit lines are selected in units of multiple lines at a time, and data are written in multiple selective transistors simultaneously.
申请公布号 US5619450(A) 申请公布日期 1997.04.08
申请号 US19950440843 申请日期 1995.05.15
申请人 FUJITSU LIMITED 发明人 TAKEGUCHI, TETSUJI
分类号 G05F3/20;G11C5/14;G11C16/04;G11C16/06;G11C16/08;G11C16/16;G11C16/30;G11C29/00;H03K3/356;H03K19/0185;H03K19/21;(IPC1-7):G11C16/06 主分类号 G05F3/20
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