| 摘要 |
In a frequency modulated digital radio transmission system, frequency differences between transmitter and receiver which give rise to DC offsets at the output of the demodulator are countered for any one data transmission by establishing a frequency controlling or DC level controlling signal during a preamble sequence having a known constant DC component, such as the sequence 10101 ------- used for clock or data synchronisation, and retaining that controlling signal substantially unaltered for use during the remainder of that data transmission. <IMAGE> |
