发明名称 MASTER-SLAVE TYPE FLIP-FLOP
摘要 <p>PURPOSE:To obtain the master-slave type flip-flop which can be increased in maximum toggle frequency while suppressing an increase in layout area and an increase in power consumption. CONSTITUTION:The master-slave type flip-flop has a master-side latch circuit 100 equipped with plural FETs, a slave-side latch circuit 200, and a buffer circuit 300. The gate width of FETs constituting the master-side latch circuit 100, slave-side latch circuit 200, and buffer circuit 300 is so determined that the fan-out number of the master-side latch circuit 100 becomes equal to the fan-out number of the slave-side latch circuit 200.</p>
申请公布号 JPH0730381(A) 申请公布日期 1995.01.31
申请号 JP19930153855 申请日期 1993.06.24
申请人 TOSHIBA CORP 发明人 MATSUO YOSHIKO;SESHIMO TOSHIKI;TERADA TOSHIYUKI;WAKIMOTO KEIJI
分类号 H03K3/3562;(IPC1-7):H03K3/356 主分类号 H03K3/3562
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