发明名称 Prodn. of integrated semiconductor circuits - comprising partially implanting electrically non-active element in peaks of di-electrically insulated islands, before thermal oxidn.
摘要 Prodn. of integrated semiconductor circuits in dielectric technology, esp. for dielectric and smart power elements, is claimed, in which an electrically non-active element, pref. N2, is partially implanted in the peaks of the dielectrically insulated islands (1,4), before starting the thermal oxidn. of the thick oxide. The lacquer mask (10,11) is appprox. 3-5 microns smaller than the dia. of the islands (1,4). The mask, used in the LOCOS process, is used for N2 implantation. Implantation dose is 1 x 10 power14-5 x 10 power16 cm power(-2). USE/ADVANTAGE - Used to produce microelectric constructional elements.
申请公布号 DE4215848(A1) 申请公布日期 1993.11.18
申请号 DE19924215848 申请日期 1992.05.14
申请人 MIKROELEKTRONIK UND TECHNOLOGIE GMBH I.L. - WERK FRANKFURT /ODER, O-1200 FRANKFURT, DE 发明人 RETZLAFF, UDO, DIPL.-KRISTALLOGRAPH DR., O-1200 FRANKFURT, DE;KNOPKE, JUERGEN, DIPL.-PHYS. DR., O-1200 FRANKFURT, DE;KRAUSE, MICHAEL, DIPL.-PHYS., O-1200 FRANKFURT, DE
分类号 H01L21/32;H01L21/762;(IPC1-7):H01L21/76 主分类号 H01L21/32
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